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| d a t a sh eet product speci?cation supersedes data of 2003 sep 11 2004 mar 22 integrated circuits TDA6650tt; tda6651tt 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog)
2004 mar 22 2 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt contents 1 features 2 applications 3 general description 4 ordering information 5 block diagram 6 pinning 7 functional description 7.1 mixer, oscillator and pll (mopll) functions 7.2 i 2 c-bus voltage 7.3 phase noise, i 2 c-bus traffic and crosstalk 8i 2 c-bus protocol 8.1 write mode; r/ w=0 8.1.1 i 2 c-bus address selection 8.1.2 xtout output buffer and mode setting 8.1.3 step frequency setting 8.1.4 agc detector setting 8.1.5 charge pump current setting 8.1.6 automatic loop bandwidth control (albc) 8.2 read mode; r/ w=1 8.3 status at power-on reset 9 limiting values 10 handling 11 thermal characteristics 12 characteristics 13 internal pin configuration 14 application and test information 14.1 tuning amplifier 14.2 crystal oscillator 14.3 examples of i 2 c-bus program sequences 15 package outline 16 soldering 16.1 introduction to soldering surface mount packages 16.2 reflow soldering 16.3 wave soldering 16.4 manual soldering 16.5 suitability of surface mount ic packages for wave and reflow soldering methods 17 data sheet status 18 definitions 19 disclaimers 20 purchase of philips i 2 c components 2004 mar 22 3 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 1 features single-chip 5 v mixer/oscillator and low phase noise pll synthesizer for tv and vcr tuners, dedicated to hybrid (digital and analog) as well as pure digital applications (dvb-t) five possible step frequencies to cope with different digital terrestrial tv and analog tv standards eight charge pump currents between 40 and 600 m ato reach the optimum phase noise performance over the bands automatic loop bandwidth control (albc) sets the optimum phase noise performance for dvb-t channels i 2 c-bus protocol compatible with 2.5, 3.3 and 5 v microcontrollers: C address + 5 data bytes transmission (i 2 c-bus write mode) C address + 1 status byte (i 2 c-bus read mode) C four independent i 2 c-bus addresses five pmos open-drain ports with 15 ma source capability for band switching and general purpose; one of these ports is combined with a 5-step adc wide band agc detector for internal tuner agc: C six programmable take-over points C two programmable time constants C agc flag in-lock flag crystal frequency output buffer 33 v tuning voltage output fractional-n programmable divider balanced mixers with a common emitter input for the low band and for the mid band (each single input) balanced mixer with a common base input for the high band (balanced input) 2-pin asymmetrical oscillator for the low band 2-pin symmetrical oscillator for the mid band 4-pin symmetrical oscillator for the high band switched concept if amplifier with both asymmetrical and symmetrical outputs to drive low impedance or saw filters i.e. 500 w //40 pf. 2 applications digital and analog terrestrial tuners (ofdm, pal, etc.) cable tuners (qam) digital tv sets digital set-top boxes. 2004 mar 22 4 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 3 general description the TDA6650tt; tda6651tt is a programmable 3-band mixer/oscillator and low phase noise pll synthesizer intended for pure 3-band tuner concepts applied to hybrid (digital and analog) terrestrial and cable tv reception. the device includes three double balanced mixers for low, mid and high bands, three oscillators for the corresponding bands, a switchable if amplifier, a wide band agc detector and a low noise pll synthesizer. the frequencies of the three bands are shown in table 1. two pins are available between the mixer output and the if amplifier input to enable if filtering for improved signal handling and to improve the adjacent channel rejection. table 1 recommended band limits in mhz for pal and dvb-t tuners; note 1 note 1. rf input frequency is the frequency of the corresponding picture carrier for analog standard. the if amplifier is switchable in order to drive both symmetrical and asymmetrical outputs. when it is used as an asymmetrical amplifier, the ifoutb pin needs to be connected to the supply voltage v cca . five open-drain pmos ports are included on the ic. two of them, bs1 and bs2, are also dedicated to the selection of the low, mid and high bands. pmos port bs5 pin is shared with the adc. the agc detector provides a control that can be used in a tuner to set the gain of the rf stage. six agc take-over points are available by software. two programmable agc time constants are available for search tuning and normal tuner operation. the local oscillator signal is fed to the fractional-n divider. the divided frequency is compared to the comparison frequency into the fast phase detector which drives the charge pump. the loop amplifier is also on-chip, including the high-voltage transistor to drive directly the 33 v tuning voltage without the need to add an external transistor. the comparison frequency is obtained from an on-chip crystal oscillator. the crystal frequency can be output to the xtout pin to drive the clock input of a digital demodulation ic. control data is entered via the i 2 c-bus; six serial bytes are required to address the device, select the local oscillator (lo) frequency, select the step frequency, program the output ports and set the charge pump current or select the albc mode, enable or disable the crystal output buffer, select the agc take-over point and time constant and/or select a specific test mode. a status byte concerning the agc level detector and the adc voltage can be read out on the sda line during a read operation. during a read operation, the loop in-lock flag, the power-on reset flag and the automatic loop bandwidth control flag are read. the device has 4 programmable addresses. each address can be selected by applying a specific voltage to pin as, enabling the use of multiple devices in the same system. the i 2 c-bus is fast mode compatible, except for the timing as described in the functional description and is compatible with 5, 3.3 and 2.5 v microcontrollers depending on the voltage applied to pin bvs. band rf input oscillator min. max. min. max. low 44.25 157.25 83.15 196.15 mid 157.25 443.25 196.15 482.15 high 443.25 863.25 482.15 902.15 4 ordering information type number package name description version TDA6650tt tssop38 plastic thin shrink small outline package; 38 leads; body width 4.4 mm; lead pitch 0.5 mm sot510-1 tda6651tt 2004 mar 22 5 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 5 block diagram handbook, full pagewidth fractional divider crystal oscillator por scl sda as bvs 15 (24) xtal1 vt hoscin2 hoscout2 hoscout1 hoscin1 19 (20) 5 (34) (17) 22 cp (16) 23 (6) 33 (3) 36 (7) 32 (8) 31 (9) 30 xtal2 20 (19) 16 (23) 17 (22) 13 (26) adc agc i 2 c-bus transceiver fractional calculator phase comparator charge pump output buffer loop amp t0, t1, t2 reference divider lock detector band switch output ports fractional spurious compensation high oscillator high mixer high input bs1 . bs2 adc/ bs5 14 (25) n [ 14:0 ] r0, r1, r2 bs5- bs1 v ccd 24 (15) hbin1 1 (38) hbin2 2 (37) mbin 3 (36) lbin 4 (35) moscin2 moscin1 (4) 35 (5) 34 xtout (21) 18 bs3 10 (29) bs1 fce723 12 (27) bs4 8 (31) bs2 11 (28) al0, al1, al2 atc agc flag agc v cca t0, t1, t2 cp0, cp1, cp2 bs1 . bs2 mid oscillator mid mixer mid input bs2 bs2 loscout loscin (2) 37 (1) 38 ifgnd (10) 29 (30) 9 low oscillator agc detector ifouta iffil1 ifoutb iffil2 7 (32) 6 (33) 27 (12) 28 (11) 26 (13) n.c. 21 (18) if amp low mixer TDA6650tt (tda6651tt) low input bs1 bs1 pllgnd (14) 25 oscgnd rfgnd fig.1 block diagram. the pin numbers in parenthesis represent the tda6651tt. 2004 mar 22 6 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 6 pinning symbol pin description TDA6650tt tda6651tt hbin1 1 38 high band rf input 1 hbin2 2 37 high band rf input 2 mbin 3 36 mid band rf input lbin 4 35 low band rf input rfgnd 5 34 rf ground iffil1 6 33 if ?lter output 1 iffil2 7 32 if ?lter output 2 bs4 8 31 pmos open-drain output port 4 for general purpose agc 9 30 agc output bs3 10 29 pmos open-drain output port 3 for general purpose bs2 11 28 pmos open-drain output port 2 to select the mid band bs1 12 27 pmos open-drain output port 1 to select the low band bvs 13 26 bus voltage selection input adc/bs5 14 25 adc input or pmos open-drain output port 5 for general purpose scl 15 24 i 2 c-bus serial clock input sda 16 23 i 2 c-bus serial data input and output as 17 22 i 2 c-bus address selection input xtout 18 21 crystal frequency buffer output xtal1 19 20 crystal oscillator input 1 xtal2 20 19 crystal oscillator input 2 n.c 21 18 not connected vt 22 17 tuning voltage output cp 23 16 charge pump output v ccd 24 15 supply voltage for the pll part pllgnd 25 14 pll ground v cca 26 13 supply voltage for the analog part ifoutb 27 12 if output b for symmetrical ampli?er and asymmetrical if ampli?er switch input ifouta 28 11 if output a ifgnd 29 10 if ground hoscin1 30 9 high band oscillator input 1 hoscout1 31 8 high band oscillator output 1 hoscout2 32 7 high band oscillator output 2 hoscin2 33 6 high band oscillator input 2 moscin1 34 5 mid band oscillator input 1 moscin2 35 4 mid band oscillator input 2 oscgnd 36 3 oscillators ground loscout 37 2 low band oscillator output loscin 38 1 low band oscillator input 2004 mar 22 7 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt handbook, halfpage TDA6650tt fce724 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 16 17 18 hbin1 hbin2 mbin lbin rfgnd iffil1 iffil2 bs4 agc bs3 bs2 bs1 bvs adc/bs5 scl sda as xtout loscin loscout oscgnd moscin2 moscin1 hoscin2 hoscout2 hoscout1 hoscin1 ifgnd ifouta ifoutb v cca pllgnd v ccd cp vt n.c. 23 22 21 20 xtal2 19 xtal1 fig.2 pin configuration TDA6650tt. handbook, halfpage tda6651tt fce874 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 16 17 18 rfgnd bs4 agc bs3 bs2 bs1 bvs adc/bs5 scl sda as xtout oscgnd ifgnd ifouta ifoutb pllgnd cp vt 23 22 21 20 xtal2 19 xtal1 hbin1 hbin2 mbin lbin iffil1 iffil2 loscin loscout moscin2 moscin1 hoscin2 hoscin1 hoscout2 hoscout1 v cca v ccd n.c. fig.3 pin configuration tda6651tt. 7 functional description 7.1 mixer, oscillator and pll (mopll) functions bit bs1 enables the bs1 port, the low band mixer and the low band oscillator. bit bs2 enables the bs2 port, the mid band mixer and the mid band oscillator. when both bs1 and bs2 bits are logic 0, the high band mixer and the high band oscillator are enabled. the oscillator signal is applied to the fractional-n programmable divider. the divided signal f div is fed to the phase comparator where it is compared in both phase and frequency with the comparison frequency f comp . this frequency is derived from the signal present on the crystal oscillator f xtal and divided in the reference divider. there is a fractional calculator on the chip that generates the data for the fractional divider as well as the reference divider ratio, depending on the step frequency selected. the crystal oscillator requires a 4 mhz crystal in series with an 18 pf capacitor between pins xtal1 and xtal2. the output of the phase comparator drives the charge pump and the loop amplifier section. this amplifier has an on-chip high voltage drive transistor. pin cp is the output of the charge pump, and pin vt is the pin to drive the tuning voltage to the varicap diodes of the oscillators and the tracking filters. the loop filter has to be connected between pins cp and vt. the spurious signals introduced by the fractional divider are automatically compensated by the spurious compensation block. 2004 mar 22 8 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt it is possible to drive the clock input of a digital demodulation ic from pin xtout with the 4 mhz signal from the crystal oscillator. this output is also used to output 1 / 2 f div and f comp signals in a specific test mode (see table 6). it is possible to switch off this output, which is recommended when it is not used. for test and alignment purposes, it is also possible to release the tuning voltage output by selecting the sinking mode (see table 6), and by applying an external voltage on pin vt. in addition to the bs1 and bs2 output ports that are used for the band selection, there are three general purpose ports bs3, bs4 and bs5. all five ports are pmos open-drain type, each with 15 ma drive capability. the connection for port bs5 and the adc input is combined on one pin. it is not possible to use the adc if port bs5 is used. the agc detector compares the level at the if amplifier output to a reference level which is selected from 6 different levels via the i 2 c-bus. the time constant of the agc can be selected via the i 2 c-bus to cope with normal operation as well as with search operation. when the output level on pin agc is higher than the threshold v rmh , then bit agc = 1. when the output level on pin agc is lower than the threshold v rml , then bit agc = 0. between these two thresholds, bit agc is not defined. the status of the agc bit can be read via the i 2 c-bus according to the read mode as described in table 12. 7.2 i 2 c-bus voltage the i 2 c-bus lines scl and sda can be connected to an i 2 c-bus system tied to 2.5, 3.3 or 5 v. the choice of the bus input threshold voltages is made with pin bvs that can be left open-circuit, connected to the supply voltage or to ground (see table 2). table 2 i 2 c-bus voltage selection 7.3 phase noise, i 2 c-bus traf?c and crosstalk while the TDA6650tt; tda6651tt is dedicated for hybrid terrestrial applications, the low noise pll will clean up the noise spectrum of the vcos close to the carrier to reach noise levels at 1 khz offset from the carrier compatible with e.g. dvb-t reception. linked to this noise improvement, some disturbances may become visible while they were not visible because they were hidden into the noise in analog dedicated applications and circuits. this is especially true for disturbances coming from the i 2 c-bus traffic, whatever this traffic is intended for the mopll or for another slave on the bus. to avoid this i 2 c-bus crosstalk and be able to have a clean noise spectrum, it is necessary to use a bus gate that enables the signal on the bus to drive the mopll only when the communication is intended for the tuner part (such a kind of i 2 c-bus gate is included into the philips terrestrial channel decoders), and to avoid unnecessary repeated sending of the same information. 8i 2 c-bus protocol the TDA6650tt; tda6651tt is controlled via the two-wire i 2 c-bus. for programming, there is one device address (7 bits) and the r/ w bit for selecting read or write mode. to be able to have more than one mopll in an i 2 c-bus system, one of four possible addresses is selected depending on the voltage applied to address selection pin as (see table 5). the TDA6650tt; tda6651tt fulfils the fast mode i 2 c-bus, according to the philips i 2 c-bus specification (see chapter 20), except for the timing as described in fig.4. the i 2 c-bus interface is designed in such a way that the pins scl and sda can be connected to 5, 3.3 or to 2.5 v pulled-up i 2 c-bus lines, depending on the voltage applied to pin bvs (see table 2). pin bvs connection bus voltage logic level low high to ground 2.5 v 0 to 0.75 v 1.75 to 5.5 v open-circuit 3.3 v 0 to 1.0 v 2.3 to 5.5 v to v cc 5 v 0 to 1.5 v 3.0 to 5.5 v 2004 mar 22 9 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 8.1 write mode; r/ w=0 after the address transmission (first byte), data bytes can be sent to the device (see table 3). five data bytes are needed to fully program the TDA6650tt; tda6651tt. the i 2 c-bus transceiver has an auto-increment facility that permits programming the device within one single transmission (address + 5 data bytes). the TDA6650tt; tda6651tt can also be partly programmed on the condition that the first data byte following the address is byte 2 (divider byte 1) or byte 4 (control byte 1). the first bit of the first data byte transmitted indicates whether byte 2 (first bit = 0) or byte 4 (first bit = 1) will follow. until an i 2 c-bus stop condition is sent by the controller, additional data bytes can be entered without the need to re-address the device. the fractional calculator is updated only at the end of the transmission (stop condition). each control byte is loaded after the 8th clock pulse of the corresponding control byte. main divider data are valid only if no new i 2 c-bus transmission is started (start condition) during the computation period of 50 m s. both db1 and db2 need to be sent to change the main divider ratio. if the value of the ratio selection bits r2, r1 and r0 are changed, the bytes db1 and db2 have to be sent in the same transmission. handbook, full pagewidth address byte divider byte 1 start address byte i 2 c transmission dedicated to another ic i 2 c transmission dedicated to the mopll start 50 m s divider byte 2 control byte 1 control byte 2 control byte 1 control byte 2 stop fce921 fig.4 example of i 2 c-bus transmission frame. table 3 i 2 c-bus write data format note 1. msb is transmitted first. name byte bit ack msb (1) lsb address byte 1 1 1 0 0 0 ma1 ma0 r/ w=0 a divider byte 1 (db1) 2 0 n14 n13 n12 n11 n10 n9 n8 a divider byte 2 (db2) 3 n7 n6 n5 n4 n3 n2 n1 n0 a control byte 1 (cb1); see table 4 4 1 t/a = 1 t2 t1 t0 r2 r1 r0 a 1 t/a = 0 0 0 atc al2 al1 al0 a control byte 2 (cb2) 5 cp2 cp1 cp0 bs5 bs4 bs3 bs2 bs1 a 2004 mar 22 10 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt table 4 description of write data format bits 8.1.1 i 2 c- bus address selection the device address contains programmable address bits ma1 and ma0, which offer the possibility of having up to four mopll ics in one system. table 5 gives the relationship between the voltage applied to the as input and the ma1 and ma0 bits. table 5 address selection bit description a acknowledge ma1 and ma0 programmable address bits; see table 5 r/ w logic 0 for write mode n14 to n0 programmable lo frequency; n = n14 2 14 + n13 2 13 + n12 2 12 + ... + n1 2 1 +n0 t/a test/agc bit t/a = 0: the next six bits sent are agc settings t/a = 1: the next six bits sent are test and reference divider ratio settings t2, t1 and t0 test bits; see table 6 r2, r1, and r0 reference divider ratio and programmable frequency step; see table 7 atc agc current setting and time constant; capacitor on pin agc = 150 nf atc = 0: agc current = 220 na; agc time constant = 2 s atc = 1: agc current = 9 m a; agc time constant = 50 ms al2, al1 and al0 agc take-over point bits; see table 8 cp2, cp1 and cp0 charge pump current; see table 9 bs5, bs4, bs3, bs2 and bs1 pmos ports control bits bsn = 0: corresponding port is off, high-impedance state (status at power-on reset) bsn = 1: corresponding port is on; v o =v cc - v ds(sat) voltage applied to pin as ma1 ma0 0 v to 0.1v cc 00 0.2v cc to 0.3v cc or open-circuit 0 1 0.4v cc to 0.6v cc 10 0.9v cc to v cc 11 2004 mar 22 11 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 8.1.2 xtout output buffer and mode setting the crystal frequency can be sent to pin xtout and used in the application, for example to drive the clock input of a digital demodulator, saving a quartz crystal in the bill of material. to output f xtal , it is necessary to set t[2:0] to 001. if the output signal on this pin is not used, it is recommended to disable it, by setting t[2:0] to 000. this pin is also used to output 1 / 2 f div and f comp in a test mode. at power-on, the xtout output buffer is set to on, supplying the f xtal signal. the relation between the signal on pin xtout and the setting of thet[2:0] bits is given in table 6. table 6 xtout buffer status and test modes notes 1. automatic loop bandwidth control (albc) is disabled at power-on reset. after power-on reset this feature is enabled by setting t[2:0] = 011. to disable again the albc, set t[2:0] = 011 again. this test mode acts like a toggle switch, which means each time it is set the status of the albc changes. to toggle the albc, two consecutive control byte 1s (cb1), should be sent: one byte with t[2:0] = 011 indicating that albc will be switched on or off and one byte programming the test mode to be selected (see table 23, example of i 2 c-bus sequence). 2. this is the default mode at power-on reset. this mode disables the tuning voltage. 8.1.3 s tep frequency setting the step frequency is set by three bits, giving five steps to cope with different application requirements. the reference divider ratio is automatically set depending on bits r2, r1 and r0. the phase detector works at either 4, 2 or 1 mhz. table 7 shows the step frequencies and corresponding reference divider ratios. when the value of bits r2, r1 and r0 are changed, it is necessary to re-send the data bytes db1 and db2. table 7 reference divider ratio select bits t2 t1 t0 pin xtout mode 0 0 0 disabled normal mode with xtout buffer off 001f xtal (4 mhz) normal mode with xtout buffer on 010 1 / 2 f div charge pump off 011f xtal (4 mhz) switch albc on or off (note 1) 100f comp test mode 101 1 / 2 f div test mode 110f xtal (4 mhz) charge pump sinking current (note 2) 1 1 1 disabled charge pump sourcing current r2 r1 r0 reference divider ratio frequency comparison frequency step 0 0 0 2 2 mhz 62.5 khz 0 0 1 1 4 mhz 142.86 khz 0 1 0 1 4 mhz 166.67 khz 0 1 1 4 1 mhz 50 khz 1 0 0 1 4 mhz 125 khz 101 -- reserved 110 -- reserved 111 -- reserved 2004 mar 22 12 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 8.1.4 agc detector setting the agc take-over point can be selected out of 6 levels according to table 8. table 8 agc programming notes 1. the agc current sources are disabled. the agc output goes into a high-impedance state and an external agc source can be connected in parallel and will not be influenced. 2. the agc detector is disabled and i agc =9 m a. 8.1.5 c harge pump current setting the charge pump current can be chosen from 8 values depending on the value of bits cp2, cp1 and cp0 bits; see table 9. the programming of the cp bits are not taken into account when albc mode is in use. table 9 charge pump current al2 al1 al0 typical take-over point level 0 0 0 124 db m v (p-p) 0 0 1 121 db m v (p-p) 0 1 0 118 db m v (p-p) 0 1 1 115 db m v (p-p) 1 0 0 112 db m v (p-p) 1 0 1 109 db m v (p-p) 110i agc = 0; note 1 111v agc = 3.5 v; note 2 cp2 cp1 cp0 charge pump current number typical current (absolute value in m a) 000 1 38 001 2 54 010 3 83 011 4 122 100 5 163 101 6 254 110 7 400 111 8 580 8.1.6 a utomatic l oop b andwidth c ontrol (albc) in a pll controlled vco in which the pll reduces phase noise close to the carrier, there is an optimum loop bandwidth corresponding to the minimum integrated phase jitter. this loop bandwidth depends on different parameters like the vco slope, the loop filter components, the dividing ratio and the gain of the phase detector and charge pump. in order to reach the best phase noise performance it is necessary, especially in a wide band system like a digital tuner, to set the charge pump current to different values depending on the band and frequency used. this is to cope with the variations of the different parameters that set the bandwidth. the selection can be done in the application and requires for each frequency to program not only the divider ratios, but also the band and the best charge pump current. the TDA6650tt; tda6651tt includes the albc feature that automatically sets the band and the charge pump current, provided the ic is used in the dvb-t standard 2004 mar 22 13 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt application shown in figs 27 and 28. this feature is activated by setting bits t[2:0] = 011 after power-on reset. this feature is disabled when the same bits are set again. when albc is activated, the output ports bs1, bs2 and bs3 are not programmed by the corresponding bs bits, but are set according to tables 10 and 11. when albc is active, bit albc = 1. table 11 summarizes the programming of the band selection and the charge pump current when albc is active. table 10 albc settings table 11 albc band selection and charge current setting bit band selected charge pump current port albc bs3 bs2 bs1 bs3 bs2 bs1 0 x 0 0 high see ta bl e 1 1 follows bit bs3 off off 0 x 0 1 low off on 0 x 1 0 mid on off 0 x 1 1 forbidden 1 x x x depends on lo program, shown in table 11 lo frequency band charge pump current number 80 to 92 mhz low 2 92 to 144 mhz 3 144 to 156 mhz 4 156 to 176 mhz 5 176 to 184 mhz 6 184 to 196 mhz 7 196 to 224 mhz mid 2 224 to 296 mhz 3 296 to 380 mhz 4 380 to 404 mhz 5 404 to 448 mhz 6 448 to 472 mhz 7 472 to 484 mhz 8 484 to 604 mhz high 4 604 to 676 mhz 5 676 to 752 mhz 6 752 to 868 mhz 7 868 to 904 mhz 8 2004 mar 22 14 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 8.2 read mode; r/ w=1 data can be read from the device by setting the r/ w bit to 1 (see table 12). after the device address has been recognized, the device generates an acknowledge pulse and the first data byte (status byte) is transferred on the sda line (msb first). data is valid on the sda line during a high level of the scl clock signal. a second data byte can be read from the device if the microcontroller generates an acknowledge on the sda line (master acknowledge). end of transmission will occur if no master acknowledge occurs. the device will then release the data line to allow the microcontroller to generate a stop condition. table 12 i 2 c-bus read data format note 1. msb is transmitted first. table 13 description of read data format bits name byte bit ack msb (1) lsb address byte 1 1 1000ma1ma0r/ w=1 a status byte 2 por fl albc 1 agc a2 a1 a0 - bit description a acknowledge bit por power-on reset ?ag por = 0, normal operation por = 1, power-on reset fl in-lock ?ag fl = 0, not locked fl = 1, the pll is locked albc automatic loop bandwidth control ?ag albc = 0, no automatic loop bandwidth control albc = 1, automatic loop bandwidth control selected agc internal agc ?ag agc = 0 when internal agc is active (v agc 2004 mar 22 15 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt table 14 adc levels note 1. accuracy is 0.03v cc . bit bs5 must be set to logic 0 to disable the bs5 output port. the bs5 output port uses the same pin as the adc and can not be used when the adc is in use. 8.3 status at power-on reset at power on or when the supply voltage drops below approximately 2.85 v (at t amb =25 c), internal registers are set according to table 15. at power on, the charge pump current is set to 580 m a, the test bits t[2:0] are set to 110 which means that the charge pump is sinking current, the tuning voltage output is disabled and the albc function is disabled. the xtout buffer is on, driving the 4 mhz signal from the crystal oscillator and all the ports are off. as a consequence, the high band is selected by default. table 15 default setting at power-on reset notes 1. x means that this bit is not set or reset at power-on reset. 2. the next six bits are written, when bit t/a = 1 in a write sequence. 3. the next six bits are written, when bit t/a = 0 in a write sequence. voltage applied to pin adc (1) a2 a1 a0 0.6v cc to v cc 100 0.45v cc to 0.6v cc 011 0.3v cc to 0.45v cc 010 0.15v cc to 0.3v cc 001 0 to 0.15v cc 000 name byte bit (1) msb lsb address byte 1 11000ma1ma0x divider byte 1 (db1) 2 0 n14 = x n13 = x n12 = x n11 = x n10 = x n9 = x n8 = x divider byte 2 (db2) 3 n7 = x n6 = x n5 = x n4 = x n3 = x n2 = x n1 = x n0 = x control byte 1 (cb1) 4 1 t/a = x; note 2 t2 = 1 t1 = 1 t0 = 0 r2 = x r1 = x r0 = x 1 t/a = x; note 3 0 0 atc = 0 al2 = 0 al1 = 1 al0 = 0 control byte 2 (cb2) 5 cp2 = 1 cp1 = 1 cp0 = 1 bs5 = 0 bs4 = 0 bs3 = 0 bs2 = 0 bs1 = 0 2004 mar 22 16 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 9 limiting values in accordance with the absolute maximum rating system (iec 60134); positive currents are entering the ic and negative currents are going out of the ic; all voltages are referenced to ground (gnd); note 1 notes 1. maximum ratings cannot be exceeded, not even momentarily without causing irreversible ic damage. maximum ratings cannot be accumulated. 2. the maximum allowed ambient temperature t amb(max) depends on the assembly conditions of the package and especially on the design of the pcb. the application mounting must be done in such a way that the maximum junction temperature t j is never exceeded. an estimation of the junction temperature can be obtained through measurement of the temperature of the top centre of the package (t package ). the temperature difference junction to case ( d t j-c )is estimated at about 13 c on the demoboard (pcb 827-3). the junction temperature is: t j =t package +d t j-c 10 handling inputs and outputs are protected against electrostatic discharge in normal handling. however, to be completely safe, it is desirable to take normal precautions appropriate to handling integrated circuits. symbol parameter conditions min. max. unit v cca , v ccd supply voltage - 0.3 +6 v v vt tuning voltage output - 0.3 +35 v v sda serial data input and output voltage - 0.3 +6 v i sda serial data output current during acknowledge 0 10 ma v scl serial clock input voltage - 0.3 +6 v v as address selection input voltage - 0.3 +6 v v n voltage on all other inputs, outputs and combined inputs and outputs, except gnds 4.5 v< v cc < 5.5 v - 0.3 v cc + 0.3 v i bsn pmos port output current corresponding port on; open-drain - 20 0 ma i bs(tot) sum of all pmos port output currents open-drain - 50 0 ma t sc(max) maximum short-circuit time each pin to v cc or to gnd - 10 s t stg storage temperature - 40 +150 c t amb ambient temperature - 20 t amb(max) (2) c t j junction temperature - +150 c 2004 mar 22 17 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 11 thermal characteristics notes 1. measured in free air as defined by jedec standard jesd51-2 2. these values are given for information only. the thermal resistance depends strongly on the nature and design of the pcb used in the application.the thermal resistance given corresponds to the value that can be measured on a multilayer pcb (4 layers) as de?ned by jedec standard. 3. the junction temperature influences strongly the reliability of an ic. the pcb used in the application contributes in a large part to the overall thermal characteristic. it must therefore be insured that the junction temperature of the ic never exceeds t j(max) = 150 c at the maximum ambient temperature. 12 characteristics v cca =v ccd =5v, t amb =25 c; values are given for an asymmetrical if output loaded with a 75 w load or with a symmetrical if output loaded with 1.25 k w ; positive currents are entering the ic and negative currents are going out of the ic; the performances of the circuits are measured in the measurement circuits figs 27 and 28 for digital application or in the measurement circuits figs 29 and 30 for hybrid application; unless otherwise speci?ed. symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient notes 1, 2 and 3 TDA6650tt 82 k/w tda6651tt 74 k/w symbol parameter conditions min. typ. max. unit supply v cc supply voltage 4.5 5.0 5.5 v i cc supply current pmos ports off 80 96 115 ma one pmos port on: sourcing 15 ma 96 112 131 ma two pmos ports on: one port sourcing 15 ma and one other port sourcing 5 ma 101 117 136 ma general functions v por power-on reset supply voltage power-on reset active if v cc 2004 mar 22 19 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt tuning voltage output: pin vt i l(off) leakage current when switched-off tuning supply voltage = 33 v -- 10 m a v o(cl) output voltage when the loop is closed charge pump off (t[2:0] = 010); tuning supply voltage = 33 v; r l =15k w 0.3 - 32.7 v noise performance j f (rms) phase jitter (rms value) integrated between 1 khz and 1 mhz offset from the carrier digital application - 0.5 - deg hybrid application - 0.6 - deg low band mixer, including if ampli?er f rf rf frequency picture carrier; note 4 43.25 - 157.25 mhz g v voltage gain asymmetrical if output; r l =75 w ; see fig.14 f rf = 44.25 mhz 21 24 27 db f rf = 157.25 mhz 21 24 27 db symmetrical if output; r l = 1.25 k w ; see fig.15 f rf = 44.25 mhz 25 28 31 db f rf = 157.25 mhz 25 28 31 db nf noise ?gure see figs 16 and 17 f rf = 50 mhz - 8.0 10.0 db f rf = 150 mhz - 8.0 10.0 db v o output voltage causing 1% cross modulation in channel asymmetrical application; see fig.18; note 5 f rf = 44.25 mhz 107 110 - db m v f rf = 157.25 mhz 107 110 - db m v symmetrical application; see fig.19; note 5 f rf = 44.25 mhz 117 120 - db m v f rf = 157.25 mhz 117 120 - db m v v i input voltage causing 750 hz frequency deviation pulling in channel asymmetrical if output - 90 - db m v int so2 channel so2 beat v rfpix =80db m v; note 6 57 60 - dbc v i(lock) input level without lock-out see fig.25; note 7 -- 120 db m v g i input conductance f rf = 44.25 mhz; see fig.5 - 0.13 - ms f rf = 157.25 mhz; see fig.5 - 0.11 - ms c i input capacitance f rf = 44.25 to 157.25 mhz; see fig.5 - 1.36 - pf symbol parameter conditions min. typ. max. unit 2004 mar 22 20 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt mid band mixer, including if ampli?er f rf rf frequency picture carrier; note 4 157.25 - 443.25 mhz g v voltage gain asymmetrical if output; load = 75 w ; see fig.14 f rf = 157.25 mhz 21 24 27 db f rf = 443.25 mhz 21 24 27 db symmetrical if output; load = 1.25 k w ; see fig.15 f rf = 157.25 mhz 25 28 31 db f rf = 443.25 mhz 25 28 31 db nf noise ?gure see figs 16 and 17 f rf = 150 mhz - 8.0 10.0 db f rf = 300 mhz - 9.0 11.0 db v o output voltage causing 1% cross modulation in channel asymmetrical application; see fig.18; note 5 f rf = 157.25 mhz 107 110 - db m v f rf = 443.25 mhz 107 110 - db m v symmetrical application; see fig.19; note 5 f rf = 157.25 mhz 117 120 - db m v f rf = 443.25 mhz 117 120 - db m v v f(n+5)-1 (n + 5) - 1 mhz pulling f rf(wanted) = 443.25 mhz; f osc = 482.15 mhz; f rf(unwanted) = 482.25 mhz; note 8 - 80 - db m v v i input voltage causing 750 hz frequency deviation pulling in channel asymmetrical if output - 89 - db m v v i(lock) input level without lock-out see fig.25; note 7 -- 120 db m v g i input conductance see fig.6 - 0.3 - ms c i input capacitance see fig.6 - 1.1 - pf high band mixer, including if ampli?er f rf rf frequency picture carrier; note 4 443.25 - 863.25 mhz g v voltage gain asymmetrical if output; load = 75 w; see fig.20 f rf = 443.25 mhz 31.5 34.5 37.5 db f rf = 863.25 mhz 31.5 34.5 37.5 db symmetrical if output; load = 1.25 k w ; see fig.21 f rf = 443.25 mhz 35.5 38.5 41.5 db f rf = 863.25 mhz 35.5 38.5 41.5 db symbol parameter conditions min. typ. max. unit 2004 mar 22 21 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt nf noise ?gure, not corrected for image see fig.22 f rf = 443.25 mhz - 6.0 8.0 db f rf = 863.25 mhz - 7.0 9.0 db v o output voltage causing 1% cross modulation in channel asymmetrical application; see fig.23; note 5 f rf = 443.25 mhz 107 110 - db m v f rf = 863.25 mhz 107 110 - db m v symmetrical application; see fig.24; note 5 f rf = 443.25 mhz 117 120 - db m v f rf = 863.25 mhz 117 120 - db m v v i(lock) input level without lock-out see fig.26; note 7 -- 120 db m v v f(n+5)-1 (n + 5) - 1 mhz pulling f rf(wanted) = 815.25 mhz; f osc = 854.15 mhz; f rf(unwanted) = 854.25 mhz; note 8 - 80 - db m v v i input voltage causing 750 hz frequency deviation pulling in channel asymmetrical if output - 79 - db m v z i input impedance (r s +jl s w ) f rf = 443.25 mhz; see fig.7 r s - 35 -w l s - 8 - nh f rf = 863.25 mhz; see fig.7 r s - 36 -w l s - 8 - nh low band oscillator f osc oscillator frequency note 9 83.15 - 196.15 mhz d f osc(v) oscillator frequency shift with supply voltage note 10 - 110 - khz d f osc(t) oscillator frequency drift with temperature d t=25 c; v cc = 5 v with compensation; note 11 - 900 - khz f osc(dig) phase noise, carrier to sideband noise in digital application 1 khz frequency offset; f comp = 4 mhz; see figs 8, 27 and 28 82 95 - dbc/hz 10 khz frequency offset; worst case in the frequency range; see figs 9, 27 and 28 87 100 - dbc/hz 100 khz frequency offset; worst case in the frequency range; see figs 10, 27 and 28 104 110 - dbc/hz 1.4 mhz frequency offset; worst case in the frequency range; see figs 27 and 28 - 117 - dbc/hz symbol parameter conditions min. typ. max. unit 2004 mar 22 22 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt f osc(hyb) phase noise, carrier to sideband noise in hybrid application 1 khz frequency offset; f comp = 4 mhz; see figs 11, 29, and 30 80 95 - dbc/hz 10 khz frequency offset; worst case in the frequency range; see figs 12, 29, and 30 85 96 - dbc/hz 100 khz frequency offset; worst case in the frequency range; see figs 13, 29, and 30 104 110 - dbc/hz 1.4 mhz frequency offset; worst case in the frequency range; see figs 29 and 30 - 117 - dbc/hz rsc p-p ripple susceptibility of v cc (peak-to-peak value) v cc =5v 5%; worst case in the frequency range; ripple frequency 500 khz; note 12 15 200 - mv mid band oscillator f osc oscillator frequency note 9 196.15 - 482.15 mhz d f osc(v) oscillator frequency shift with supply voltage note 10 - 110 - khz d f osc(t) oscillator frequency drift with temperature d t=25 c; v cc = 5 v with compensation; note 11 - 1500 - khz f osc(dig) phase noise, carrier to sideband noise in digital application 1 khz frequency offset; f comp = 4 mhz; see figs 8, 27 and 28 85 90 - dbc/hz 10 khz frequency offset; worst case in the frequency range; see figs 9, 27 and 28 87 95 - dbc/hz 100 khz frequency offset; worst case in the frequency range; see figs 10, 27 and 28 104 110 - dbc/hz 1.4 mhz frequency offset; worst case in the frequency range; see figs 27 and 28 - 115 - dbc/hz f osc(hyb) phase noise, carrier to sideband noise in hybrid application 1 khz frequency offset; f comp = 4 mhz; see figs 11, 29 and 30 82 88 - dbc/hz 10 khz frequency offset; worst case in the frequency range; see figs 12, 29 and 30 85 90 - dbc/hz 100 khz frequency offset; worst case in the frequency range; see figs 13, 29 and 30 104 110 - dbc/hz 1.4 mhz frequency offset; worst case in the frequency range; see figs 29 and 30 - 115 - dbc/hz symbol parameter conditions min. typ. max. unit 2004 mar 22 23 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt rsc p-p ripple susceptibility of v cc (peak-to-peak value) v cc =5v 5%; worst case in the frequency range; ripple frequency 500 khz; note 12 15 140 - mv high band oscillator f osc oscillator frequency note 9 482.15 - 902.15 mhz d f osc(v) oscillator frequency shift with supply voltage note 10 - 300 - khz d f osc(t) oscillator frequency drift with temperature d t=25 c; v cc = 5 v; with compensation; note 11 - 1100 - khz f osc(dig) phase noise, carrier to sideband noise in digital application 1 khz frequency offset; f comp = 4 mhz; see figs 8, 27 and 28 85 89 - dbc/hz 10 khz frequency offset; worst case in the frequency range; see figs 9, 27 and 28 87 93 - dbc/hz 100 khz frequency offset; worst case in the frequency range; see figs 11, 27 and 28 104 107 - dbc/hz 1.4 mhz frequency offset; worst case in the frequency range; see figs 27 and 28 - 117 - dbc/hz f osc(hyb) phase noise, carrier to sideband noise in hybrid application 1 khz frequency offset; f comp = 4 mhz; see figs 11, 29 and 30 80 85 - dbc/hz 10 khz frequency offset; worst case in the frequency range; see figs 12, 29 and 30 82 86 - dbc/hz 100 khz frequency offset; worst case in the frequency range; see figs 13, 29 and 30 104 107 - dbc/hz 1.4 mhz frequency offset; worst case in the frequency range; see figs 29 and 30 - 117 - dbc/hz rsc p-p ripple susceptibility of v cc (peak-to-peak value) v cc =5v 5%; worst case in the frequency range; ripple frequency 500 khz; note 12 15 40 - mv if ampli?er z o output impedance asymmetrical if output r s at 38.9 mhz - 50 -w l s at 38.9 mhz - 5.4 - nh symmetrical if output r s at 38.9 mhz - 100 -w l s at 38.9 mhz - 10.4 - nh symbol parameter conditions min. typ. max. unit 2004 mar 22 24 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt rejection at the if output (if ampli?er in asymmetrical mode) int div divider interferences in if level worst case; note 13 -- 20 db m v int xtal crystal oscillator interferences rejection v if = 100 db m v; worst case in the frequency range; note 14 --- 50 dbc int f(step) step frequency rejection measured in digital application for dvb-t; f step = 166.67 khz; if = 36.125 mhz; note 15 --- 50 dbc measured in hybrid application for dvb-t; f step = 166.67 khz; if = 36.125 mhz; note 15 --- 57 dbc measured in hybrid application for pal; f step = 62.5 khz; if = 38.9 mhz; note 15 --- 57 dbc measured in hybrid application for fm; f step = 50 khz; if = 38.9 mhz; note 15 --- 57 dbc int xth crystal oscillator harmonics in the if frequency note 16 -- 45 db m v agc output (if ampli?er in asymmetrical mode): pin agc agc top(p-p) agc take-over point (peak-to-peak level) bits al[2:0] = 000 122.5 124 125.5 db m v i source(fast) source current fast 7.5 9.0 11.6 m a i source(slow) source current slow 185 220 280 na v o output voltage maximum level 3.45 3.55 3.8 v minimum level 0 - 0.1 v v o(dis) output voltage with agc disabled bits al[2:0] = 111 3.45 3.55 3.8 v v rf(slip) rf voltage range to switch the agc from active to not active mode -- 0.5 db v rml low threshold agc output voltage agc bit = 0 or agc not active 0 - 2.8 v v rmh high threshold agc output voltage agc bit = 1 or agc active 3.2 3.55 3.8 v i lo leakage current bits al[2:0] = 110; 0 < v agc 2004 mar 22 26 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt handbook, full pagewidth mce160 0.2 2 1 0.5 10 5 0.2 2 1 0.5 10 5 0 + j - j 0.2 0.5 1 2 5 10 40 mhz 200 mhz fig.5 input admittance (s 11 ) of the low band mixer (40 to 200 mhz); y o =20ms. handbook, full pagewidth mce161 0.2 2 1 0.5 10 5 0.2 2 1 0.5 10 5 0 + j - j 0.2 0.5 1 2 5 10 100 mhz 500 mhz fig.6 input admittance (s 11 ) of the mid band mixer (100 to 500 mhz); y o =20ms. 2004 mar 22 27 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt handbook, full pagewidth 0.2 0.5 1 2 5 10 0.2 0.5 1 2 5 10 0 + j - j mce165 0.5 1 0.2 10 5 2 900 mhz 400 mhz fig.7 input impedance (s 11 ) of the high band mixer (400 to 900 mhz); z o = 100 w . handbook, full pagewidth 940 - 80 40 140 240 340 440 640 740 f rf (mhz) 840 540 - 100 - 95 - 90 - 85 fce915 f osc (dbc/hz) fig.8 1 khz phase noise typical performance in digital application (figs 27 and 28). 2004 mar 22 28 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt handbook, full pagewidth 940 - 80 40 140 240 340 440 640 740 f rf (mhz) 840 540 - 110 - 100 - 105 - 95 - 90 - 85 fce916 f osc (dbc/hz) fig.9 10 khz phase noise typical performance in digital application (figs 27 and 28). handbook, full pagewidth 940 - 100 40 140 240 340 440 640 740 f rf (mhz) 840 540 - 120 - 115 - 110 - 105 fce917 f osc (dbc/hz) fig.10 100 khz phase noise typical performance in digital application (figs 27 and 28). 2004 mar 22 29 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt handbook, full pagewidth 940 - 80 - 105 40 140 240 340 440 640 740 f rf (mhz) 840 540 f osc (dbc/hz) - 100 - 95 - 90 - 85 fce918 fig.11 1 khz phase noise typical performance in hybrid application (figs 29 and 30). handbook, full pagewidth 940 - 80 - 105 40 140 240 340 440 640 740 f rf (mhz) 840 540 - 100 - 95 - 90 - 85 fce919 f osc (dbc/hz) fig.12 10 khz phase noise typical performance in hybrid application (figs 29 and 30). 2004 mar 22 30 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt handbook, full pagewidth 940 - 100 40 140 240 340 440 640 740 f rf (mhz) 840 540 - 120 - 115 - 110 - 105 fce920 f osc (dbc/hz) fig.13 100 khz phase noise typical performance in hybrid application (figs 29 and 30). handbook, full pagewidth fce747 v lbin or mbin ifouta e dut ifoutb v cca 50 w signal source v' meas v meas rms voltmeter 50 w 50 w spectrum analyzer 27 w v o v i fig.14 gain (g v ) measurement in low and mid band with asymmetrical if output. z i >> 50 w? v i =2 v meas =70db m v. v i =v meas +6db=70db m v. v o =v meas + 3.75 db. g v = 20 log . v o v i ------ dvb-t and pal. if = 38.9 mhz. 2004 mar 22 31 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt handbook, full pagewidth fce748 v ifouta e dut ifoutb c n1 n2 transformer 50 w signal source lbin or mbin v meas v' meas rms voltmeter 50 w 50 w spectrum analyzer v o v i z i >> 50 w? v i =2 v meas = 70 db m v. v i =v meas +6db=70db m v. v o =v meas + 15 db (transformer ratio n2/n1 = 5 and transformer loss). g v = 20 log . v o v i ------ dvb-t and pal. if = 38.9 mhz. n1 = 10 turns. n2 = 2 turns. n1/n2 = 5. fig.15 gain (g v ) measurement in low and mid band with symmetrical if output. handbook, full pagewidth fce750 lbin or mbin ifouta dut noise source noise figure meter bnc rim input circuit ifoutb v cca 27 w fig.16 noise figure (nf) measurement in low and mid band with asymmetrical if output. nf = nf meas - loss of input circuit (db). 2004 mar 22 32 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt handbook, full pagewidth mce452 lp cp cs cc tl to the ic mixer input lp cp ls cc tl to the ic mixer input bnc connector bnc connector fig.17 input circuit for optimum noise figure in low and mid band. for f rf =50mhz (schematic a) loss = 0 db. cs = 12 pf in parallel with a 0.8 pf to 8 pf trimmer. cp = 18 pf in parallel with a 0.8 pf to 8 pf trimmer. cc = 4.7 nf. lp = 8 turns, ? 5 mm, wire ? = 0.4 mm air coil tl=50 w semi rigid cable, length = 75 mm. for f rf = 150 mhz (schematic a) loss = 0 db. cs = 0.8 pf to 8 pf trimmer. cp = 0.4 pf to 2.5 pf trimmer. cc = 4.7 nf. lp = 4 turns, ? 4.5 mm, wire ? = 0.4 mm air coil tl=50 w semi rigid cable, length = 75 mm. for f rf = 300 mhz (schematic b) loss = 0.5 db. cp = 8.2 pf in parallel with a 0.8 pf to 8 pf trimmer. cc = 4.7 nf. ls = 2 turns, ? 1.5 mm, wire ? = 0.4 mm air coil. lp = 2 turns, ? 1.5 mm, wire ? = 0.4 mm air coil. tl=50 w semi rigid cable, length = 75 mm. schematic a. schematic b. 38.9 mhz v a b c d hybrid filter lbin or mbin ifouta dut ifoutb v cca fce749 50 w wanted signal source unwanted signal source am = 30% 1 khz 10 db attenuator v meas rms voltmeter 50 w 50 w e u e w 50 w modulation analyzer 27 w v o fig.18 cross modulation measurement in low and mid band with asymmetrical if output. v o =v meas + 3.75 db. wanted signal source at f rfpix is 80 db m v. unwanted output signal at f snd . the level of unwanted signal is measured by causing 1% am modulation in the wanted signal. 2004 mar 22 33 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt a b c d hybrid ifouta ifoutb fce793 c n1 n2 transformer v filter 38.9 mhz 50 w wanted signal source unwanted signal source am = 30% 1 khz lbin or mbin 6 db attenuator v' meas rms voltmeter dut 50 w 50 w e u e w 50 w modulation analyzer v o fig.19 cross modulation measurement in low and mid band with symmetrical if output. v meas =v o - (transformer ratio n1/n2 = 5 and loss). wanted signal source at f rfpix is 80 db m v. the level of unwanted signal v o at f snd is measured by causing 1% am modulation in the wanted output signal. n1 = 10 turns. n2 = 2 turns. n1/n2 = 5. handbook, full pagewidth fce751 v ifouta dut a b c d hybrid ifoutb v cca e 50 w 50 w signal source hbin1 hbin2 v meas rms voltmeter 50 w 50 w spectrum analyzer 27 w v o v i fig.20 gain (g va ) measurement in high band with asymmetrical if output. loss in hybrid = 1 db. v i =v meas - loss = 70 db m v. v o =v meas + 3.75 db. g v = 20 log . v o v i ------ dvb-t and pal. if = 38.9 mhz. 2004 mar 22 34 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt handbook, full pagewidth fce752 v ifouta dut a b c d hybrid ifoutb e c n1 n2 transformer 50 w 50 w signal source hbin1 hbin2 v meas v' meas rms voltmeter 50 w 50 w spectrum analyzer v o v i fig.21 gain (g vs ) measurement in high band with symmetrical if output. loss in hybrid = 1 db. v i =v meas - loss = 70 db m v. v o =v meas + 15 db (transformer ratio n2/n1 = 5 and transformer loss). g v = 20 log . v o v i ------ dvb-t and pal. if = 38.9 mhz. handbook, full pagewidth fce753 dut noise source noise figure meter a b c d hybrid ifouta ifoutb v cca 50 w hbin1 hbin2 27 w fig.22 noise figure (nf) measurement in high band with asymmetrical if output. loss in hybrid = 1 db. nf = nf meas - loss. 2004 mar 22 35 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 50 w 50 w wanted signal source unwanted signal source am = 30% 1 khz v hbin1 hbin2 a b c d hybrid a b c d hybrid 10 db attenuator v meas rms voltmeter filter dut 38.9 mhz 50 w 50 w e u e w ifouta ifoutb v cca fce754 50 w modulation analyzer 27 w v o fig.23 cross modulation measurement in high band with asymmetrical if output. wanted signal source at f rfpix is 70 db m v. unwanted output signal at f snd . the level of unwanted signal is measured by causing 1% am modulation in the wanted signal. a b c d hybrid a b c d hybrid dut ifouta ifoutb fce794 c n1 n2 transformer v filter 38.9 mhz 50 w 50 w wanted signal source unwanted signal source am = 30% 1 khz hbin1 hbin2 6 db attenuator v' meas rms voltmeter 50 w 50 w e u e w 50 w modulation analyzer v o fig.24 cross modulation measurement in high band with symmetrical if output. v meas =v o - (transformer ratio n1/n2 = 5 and loss). n1 = 10 turns. n2 = 2 turns. n1 / n2 = 5. 2004 mar 22 36 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt handbook, full pagewidth fce755 50 w 50 w 50 w v e v meas rms voltmeter spectrum analyzer dut signal source lbin or mbin ifouta ifoutb v cca 27 w fig.25 maximum rf input level without lock-out in low and mid band with asymmetrical if output. z i >> 50 w? v i =2 v meas . v i =v meas + 6 db. handbook, full pagewidth fce756 v dut a b e c d hybrid hbin1 hbin2 ifouta ifoutb v cca 50 w 50 w 50 w 50 w v meas rms voltmeter spectrum analyzer signal source 27 w v i fig.26 maximum rf input level without lock-out in high band with asymmetrical if output. loss in hybrid = 1 db. v i =v meas - loss. 2004 mar 22 37 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt the TDA6650tt, tda6651tt pll loop stability is guaranteed in the configuration of figs. 27, 28, 29 and 30. in this configuration, the external supply source is 30 v minimum, the pull-up resistor r19, is 15 k w and all of the local oscillators are aligned to operate at a maximum tuning voltage of 26 v. if the configuration is changed, there might be an impact on the loop stability. for any other configurations, a stability analysis must be performed. the conventional pll ac model (cf. simpata philips software) used for the stability analysis, is valid provided the external source (dc supply source or dc-to-dc converter) is able to deliver a minimum current that is equal to the charge pump current in use. the delivered current can be simply calculated with the following formula: where i delivered is the delivered current v dc is the supply source voltage or dc-to-dc converter output voltage v t is the tuning voltage r pu is the pull-up resistor between the dc supply source (or the dc-to-dc converter output) and the tuning line (r19 in figs. 27 to 30) i cp is the charge pump current in use. i delivered v dc v t C r pu ----------------------- - ? ?? i cp > = 2004 mar 22 38 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... handbook, full pagewidth 1 (38) j4 low c4 4.7 nf hbin1 1 l4 t0k0; 500 nf 64 2 * 6t 3 2 2 (37) hbin2 3 (36) mbin 4 (35) lbin 5 (34) rfgnd 6 (33) iffil1 7 (32) iffil2 8 (31) bs4 9 (30) agc 10 (29) TDA6650tt (tda6651tt) bs3 11 (28) bs2 12 (27) bs1 13 (26) bvs 14 (25) adc/bs5 15 (24) scl 16 (23) sda 17 (22) as 18 (21) 1234 5 v bus j8 j7 scl sda as 56 xtout 19 (20) c19 c30 10 m f 18 pf y1 4 mhz xtal1 (1) 38 loscin (2) 37 loscout (3) 36 oscgnd (4) 35 moscin2 (5) 34 moscin1 (6) 33 hoscin2 (7) 32 hoscout2 (8) 31 hoscout1 (9) 30 hoscin1 (10) 29 ifgnd (11) 28 ifouta (12) 27 ifoutb (13) 26 (14) 25 pllgnd (15) 24 v ccd v cca (16) 23 cp (17) 22 vt (18) 21 n.c. (19) 20 xtal2 r20 c27 c28 150 nf tp1 agc 12 pf d4 1 k w r21 d5 1 k w r22 d6 1 k w r23 d7 1 k w r24 st2 adc v cc d8 1 k w r14 r9 330 w r10 330 w r11 330 w c29 4.7 nf test r27 3.3 k w r28 3.3 k w 1 k w c26 12 pf j3 mid c3 4.7 nf j1 high1 c1 4.7 nf j2 high2 c2 4.7 nf st1 1234 j5 5 v bus 30 v v cc v cc 5 v bus v cc v cc 30 v j6 if out mce162 c32 10 m f c31 10 m f l3 c7 1.8 pf n750 c34 120 pf n750 c33 120 pf n750 15 pf n470 2.7 nf c11 1 pf n750 c12 1 pf n750 c13 1 pf n750 c14 1 pf n750 c6 1.5 pf n750 c5 d1 l1 25 nh l2 13 nh r01255 d2 bb178 d3 bb179 bb182 47 pf n750 r1 12 w r3 5.6 k w r8 r7 1 k w r26 27 w r19 15 k w 5.6 k w r5 5.6 k w r2 1 k w r13 6.8 k w r4 5.6 k w r6 27 w 140 nh r08304 c18 c17 c23 4.7 nf c21 100 nf c20 330 pf c16 4.7 nf c15 4.7 nf fig.27 measurement circuit for digital application, with asymmetrical if output and dvb-t compliant loop filter. the pin numbers in parenthesis represent the tda6651tt. 2004 mar 22 39 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... j4 low c4 4.7 nf hbin1 1 l4 t0k0; 500 nf 64 2 * 6t 3 2 hbin2 mbin lbin rfgnd iffil1 iffil2 bs4 agc bs3 bs2 bs1 bvs adc/bs5 scl sda as 1234 5 v bus j8 j7 scl sda as 56 xtout c19 c30 10 m f 18 pf y1 4 mhz xtal1 loscin loscout oscgnd moscin2 moscin1 hoscin2 hoscout2 hoscout1 hoscin1 ifgnd ifouta ifoutb pllgnd v ccd v cca cp vt n.c. xtal2 r20 c27 c28 150 nf tp1 agc 12 pf d4 1 k w r21 d5 1 k w r22 d6 1 k w r23 d7 1 k w r24 st2 adc v cc d8 1 k w r14 r9 330 w r10 330 w r11 330 w c29 4.7 nf test r27 3.3 k w r28 3.3 k w 1 k w c26 12 pf j3 mid c3 4.7 nf j1 high1 c1 4.7 nf j2 high2 c2 4.7 nf st1 1234 j5 5 v bus 30 v v cc v cc 5 v bus v cc 30 v j6 if out 4 3 12 6 fce875 c32 10 m f c31 10 m f l3 c7 1.8 pf n750 c34 120 pf n750 c33 120 pf n750 15 pf n470 2.7 nf c11 1 pf n750 c12 1 pf n750 c13 1 pf n750 c14 1 pf n750 c6 1.5 pf n750 c5 d1 l1 25 nh l2 13 nh r01255 d2 bb178 d3 bb179 bb182 47 pf n750 r1 12 w r3 5.6 k w r8 r7 1 k w r26 0 w r19 15 k w 5.6 k w r5 5.6 k w r2 1 k w r13 6.8 k w r4 5.6 k w r6 27 w 140 nh r08304 c18 c17 12 pf c25 c23 4.7 nf c24 4.7 nf c21 100 nf c20 330 pf c16 4.7 nf c15 4.7 nf 1 (38) 2 (37) 3 (36) 4 (35) 5 (34) 6 (33) 7 (32) 8 (31) 9 (30) 10 (29) TDA6650tt (tda6651tt) 11 (28) 12 (27) 13 (26) 14 (25) 15 (24) 16 (23) 17 (22) 18 (21) 19 (20) (1) 38 (2) 37 (3) 36 (4) 35 (5) 34 (6) 33 (7) 32 (8) 31 (9) 30 (10) 29 (11) 28 (12) 27 (13) 26 (14) 25 (15) 24 (16) 23 (17) 22 (18) 21 (19) 20 fig.28 measurement circuit for digital application, with symmetrical if output and dvb-t compliant loop filter. the pin numbers in parenthesis represent the tda6651tt. 2004 mar 22 40 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... handbook, full pagewidth j4 low c4 4.7 nf hbin1 1 l4 t0k0; 500 nf 64 2 * 6t 3 2 hbin2 mbin lbin rfgnd iffil1 iffil2 bs4 agc bs3 bs2 bs1 bvs adc/bs5 scl sda as 1234 5 v bus j8 j7 scl sda as 56 xtout c19 c30 10 m f 18 pf y1 4 mhz xtal1 loscin loscout oscgnd moscin2 moscin1 hoscin2 hoscout2 hoscout1 hoscin1 ifgnd ifouta ifoutb pllgnd v ccd v cca cp vt n.c. xtal2 r20 c27 c28 150 nf tp1 agc 12 pf d4 1 k w r21 d5 1 k w r22 d6 1 k w r23 d7 1 k w r24 st2 adc v cc d8 1 k w r14 r9 330 w r10 330 w r11 330 w c29 4.7 nf test r27 3.3 k w r28 3.3 k w 1 k w c26 12 pf j3 mid c3 4.7 nf j1 high1 c1 4.7 nf j2 high2 c2 4.7 nf st1 1234 j5 5 v bus 30 v v cc v cc 5 v bus v cc v cc 30 v j6 if out fce909 c32 10 m f c31 10 m f l3 c7 1.8 pf n750 c34 120 pf n750 c33 120 pf n750 15 pf n470 4.7 nf c11 1 pf n750 c12 1 pf n750 c13 1 pf n750 c14 1 pf n750 c6 1.5 pf n750 c5 d1 l1 25 nh l2 13 nh r01255 d2 bb178 d3 bb179 bb182 47 pf n750 r1 12 w r3 5.6 k w r8 r7 1 k w r26 27 w r19 15 k w 5.6 k w r5 5.6 k w r2 1 k w r13 1.8 k w r4 5.6 k w r6 27 w 140 nh r08304 c18 c17 c23 4.7 nf c21 100 nf c20 2.7 nf c16 4.7 nf c15 4.7 nf 1 (38) 2 (37) 3 (36) 4 (35) 5 (34) 6 (33) 7 (32) 8 (31) 9 (30) 10 (29) TDA6650tt (tda6651tt) 11 (28) 12 (27) 13 (26) 14 (25) 15 (24) 16 (23) 17 (22) 18 (21) 19 (20) (1) 38 (2) 37 (3) 36 (4) 35 (5) 34 (6) 33 (7) 32 (8) 31 (9) 30 (10) 29 (11) 28 (12) 27 (13) 26 (14) 25 (15) 24 (16) 23 (17) 22 (18) 21 (19) 20 fig.29 measurement circuit for hybrid application, with asymmetrical if output and loop filter for pal and dvb-t standards. the pin numbers in parenthesis represent the tda6651tt. 2004 mar 22 41 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... j4 low c4 4.7 nf hbin1 1 l4 t0k0; 500 nf 64 2 * 6t 3 2 hbin2 mbin lbin rfgnd iffil1 iffil2 bs4 agc bs3 bs2 bs1 bvs adc/bs5 scl sda as 1234 5 v bus j8 j7 scl sda as 56 xtout c19 c30 10 m f 18 pf y1 4 mhz xtal1 loscin loscout oscgnd moscin2 moscin1 hoscin2 hoscout2 hoscout1 hoscin1 ifgnd ifouta ifoutb pllgnd v ccd v cca cp vt n.c. xtal2 r20 c27 c28 150 nf tp1 agc 12 pf d4 1 k w r21 d5 1 k w r22 d6 1 k w r23 d7 1 k w r24 st2 adc v cc d8 1 k w r14 r9 330 w r10 330 w r11 330 w c29 4.7 nf test r27 3.3 k w r28 3.3 k w 1 k w c26 12 pf j3 mid c3 4.7 nf j1 high1 c1 4.7 nf j2 high2 c2 4.7 nf st1 1234 j5 5 v bus 30 v v cc v cc 5 v bus v cc 30 v j6 if out 4 3 12 6 fce910 c32 10 m f c31 10 m f l3 c7 1.8 pf n750 c34 120 pf n750 c33 120 pf n750 15 pf n470 2.7 nf c11 1 pf n750 c12 1 pf n750 c13 1 pf n750 c14 1 pf n750 c6 1.5 pf n750 c5 d1 l1 25 nh l2 13 nh r01255 d2 bb178 d3 bb179 bb182 47 pf n750 r1 12 w r3 5.6 k w r8 r7 1 k w r26 0 w r19 15 k w 5.6 k w r5 5.6 k w r2 1 k w r13 6.8 k w r4 5.6 k w r6 27 w 140 nh r08304 c18 c17 12 pf c25 c23 4.7 nf c24 4.7 nf c21 100 nf c20 2.7 nf c16 4.7 nf c15 4.7 nf 1 (38) 2 (37) 3 (36) 4 (35) 5 (34) 6 (33) 7 (32) 8 (31) 9 (30) 10 (29) TDA6650tt (tda6651tt) 11 (28) 12 (27) 13 (26) 14 (25) 15 (24) 16 (23) 17 (22) 18 (21) 19 (20) (1) 38 (2) 37 (3) 36 (4) 35 (5) 34 (6) 33 (7) 32 (8) 31 (9) 30 (10) 29 (11) 28 (12) 27 (13) 26 (14) 25 (15) 24 (16) 23 (17) 22 (18) 21 (19) 20 fig.30 measurement circuit for hybrid application, with symmetrical if output and loop filter for pal and dvb-t standards. the pin numbers in parenthesis represent the tda6651tt. 2004 mar 22 42 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 13 internal pin configuration symbol pin average dc voltage versus band selection description (1) TDA6650tt tda6651tt low mid high hbin1 1 38 n.a. n.a 1.0 v hbin2 2 37 n.a. n.a 1.0 v mbin 3 36 n.a. 1.8 v n.a. lbin 4 35 1.8 v n.a. n.a rfgnd 5 34 --- iffil1 6 33 3.7 v 3.7 v 3.7 v iffil2 7 32 3.7 v 3.7 v 3.7 v fce899 (38) 1 2 (37) fce901 (36) 3 fce898 (35) 4 fce897 5 (34) fce896 7 (32) (33) 6 2004 mar 22 43 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt bs4 8 31 high z or v cc - v ds high z or v cc - v ds high z or v cc - v ds agc 9 30 0 v or 3.5 v 0 v or 3.5 v 0 v or 3.5 v bs3 10 29 high z or v cc - v ds high z or v cc - v ds high z or v cc - v ds bs2 11 28 high z v cc - v ds high z bs1 12 27 v cc - v ds high z high z symbol pin average dc voltage versus band selection description (1) TDA6650tt tda6651tt low mid high fce895 8 (31) fce907 9 (30) fce893 10 (29) fce892 11 (28) fce891 12 (27) 2004 mar 22 44 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt bvs 13 26 2.5 v 2.5 v 2.5 v adc/bs5 14 25 v cesat or high z v cesat or high z v cesat or high z scl 15 24 high z high z high z sda 16 23 high z high z high z as 17 22 1.25 v 1.25 v 1.25 v symbol pin average dc voltage versus band selection description (1) TDA6650tt tda6651tt low mid high mce163 (26) 13 fce887 (25) 14 fce889 (24) 15 fce888 (23) 16 fce890 (22) 17 2004 mar 22 45 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt xtout 18 21 3.45 v 3.45 v 3.45 v xtal1 19 20 2.2 v 2.2 v 2.2 v xtal2 20 19 2.2 v 2.2 v 2.2 v n.c. 21 18 n.a. not connected vt 22 17 v vt v vt v vt cp 23 16 1.8 v 1.8 v 1.8 v v ccd 24 15 5v 5v 5v symbol pin average dc voltage versus band selection description (1) TDA6650tt tda6651tt low mid high mce164 18 (21) 19 (20) 20 (19) fce883 fce884 22 (17) fce885 23 (16) 2004 mar 22 46 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt pllgnd 25 14 --- v cca 26 13 5v 5v 5v ifoutb 27 12 2.1 v 2.1 v 2.1 v ifouta 28 11 2.1 v 2.1 v 2.1 v ifgnd 29 10 --- hoscin1 30 9 2.2 v 2.2 v 1.8 v hoscout1 31 8 5 v 5 v 2.5 v hoscout2 32 7 5 v 5 v 2.5 v hoscin2 33 6 2.2 v 2.2 v 1.8 v moscin1 34 5 2.3 v 1.3 v 2.3 v moscin2 35 4 2.3 v 1.3 v 2.3 v symbol pin average dc voltage versus band selection description (1) TDA6650tt tda6651tt low mid high fce882 25 (14) fce886 28 (11) fce880 29 (10) fce879 33 32 30 31 (8) (7) (6) (9) 34 (5) 35 (4) fce878 2004 mar 22 47 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt note 1. the pin numbers in parenthesis refer to the tda6651tt. oscgnd 36 3 --- loscout 37 2 1.7 v 1.4 v 1.4 v loscin 38 1 2.9 v 3.5 v 3.5 v symbol pin average dc voltage versus band selection description (1) TDA6650tt tda6651tt low mid high fce908 36 (3) fce877 38 37 (2) (1) 2004 mar 22 48 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 14 application and test information 14.1 tuning ampli?er the tuning amplifier is capable of driving the varicap voltage without an external transistor. the tuning voltage output must be connected to an external load of 15 k w which is connected to the tuning voltage supply rail. the loop filter design depends on the oscillator characteristics and the selected reference frequency as well as the required pll loop bandwidth. applications with the TDA6650tt; tda6651tt have a large loop bandwidth, in the order of a few tens of khz. the calculation of the loop filter elements has to be done for each application, it depends on the reference frequency and charge pump current. a simulation of the loop can easily be done using the simpata software from philips. 14.2 crystal oscillator the TDA6650tt; tda6651tt needs to be used with a 4 mhz crystal in series with a capacitor with a typical value of 18 pf, connected between pin xtal1 and pin xtal2. philips crystal 4322 143 04093 is recommended. when choosing a crystal, take care to select a crystal able to withstand the drive level of the TDA6650tt; tda6651tt without suffering from accelerated ageing. for optimum performances, it is highly recommended to connect the 4 mhz crystal without any serial resistance. the crystal oscillator of the TDA6650tt; tda6651tt should not be driven (forced) from an external signal. do not use the signal on pins xtal1 or xtal2, or the signal present on the crystal, to drive an external ic or for any other use as this may dramatically degrade the phase noise performance of the TDA6650tt; tda6651tt. 14.3 examples of i 2 c-bus program sequences tables 16 to 23 show various sequences where: s = start a = acknowledge p = stop. the following conditions apply: lo frequency is 800 mhz f comp = 166.666 khz n = 4800 bs3 output port is on and all other ports are off: thus the high band is selected charge pump current i cp = 280 m a normal mode, with xtout buffer on i agc = 220 na agc take-over point is set to 112 db m v (p-p) address selection is adjusted to make address c2 valid. to fully program the device, either sequence of table 16 or 17 can be used, while other arrangements of the bytes are also possible. table 16 complete sequence 1 notes 1. control byte 1 with bit t/a = 1, to program test bits t2, t1 and t0 and reference divider ratio bits r2, r1 and r0. 2. control byte 1 with bit t/a = 0, to program agc time constant bit atc and agc take-over point bits al2, al1 and al0. table 17 complete sequence 2 notes 1. control byte 1 with bit t/a = 1, to program test bits t2, t1 and t0 and reference divider ratio bits r2, r1 and r0. 2. control byte 1 with bit t/a = 0, to program agc time constant bit atc and agc take-over point bits al2, al1 and al0. start address byte divider byte 1 divider byte 2 control byte 1 (1) control byte 2 control byte 1 (2) stop s c2 a 12 a c0 a ca a a4 a 84 a p start address byte control byte 1 (1) control byte 2 divider byte 1 divider byte 2 control byte 1 (2) stop s c2 a ca a a4 a 12 a c0 a 84 a p 2004 mar 22 49 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt table 18 sequence to program only the main divider ratio table 19 sequence to change the charge pump current, the ports and the test mode. if the reference divider ratio is changed, it is necessary to send the db1 and db2 bytes note 1. control byte 1 with bit t/a = 1, to program test bits t2, t1 and t0 and reference divider ratio bits r2, r1 and r0. table 20 sequence to change the test mode. if the reference divider ratio is changed, it is necessary to send the db1 and db2 bytes note 1. control byte 1 with bit t/a = 1, to program test bits t2, t1 and t0 and reference divider ratio bits r2, r1 and r0. table 21 sequence to change the charge pump current, the ports and the agc data note 1. control byte 1 with bit t/a = 0, to program agc time constant bit atc and agc take-over point bits al2, al1 and al0. table 22 sequence to change only the agc data note 1. control byte 1 with bit t/a = 0, to program agc time constant bit atc and agc take-over point bits al2, al1 and al0. table 23 sequence to program the main divider, the albc on and the test modes in normal mode with xtout buffer off. note 1. control byte 1 with bit t/a = 1, to program test bits t2, t1 and t0 and reference divider ratio bits r2, r1 and r0. start address byte divider byte 1 divider byte 2 stop sc2a12ac0a p start address byte control byte 1 (1) control byte 2 stop s c2 a ca a a4 a p start address byte control byte 1 (1) stop sc2acaa p start address byte control byte 1 (1) control byte 2 stop s c2 a 82 a a4 a p start address byte control byte 1 (1) stop sc2a84a p star t address byte divider byte 1 divider byte 2 control byte 1 (1) control byte 2 control byte 1 stop sc2a12ac0adaa00ac2a p 2004 mar 22 50 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 15 package outline unit a 1 a 2 a 3 b p cd (1) e (2) eh e ll p z (1) y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 8 0 o o 0.08 dimensions (mm are the original dimensions). notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. sot510-1 98-09-16 03-02-18 w m q a a 1 a 2 d l p detail x e z e c l x (a ) 3 0.25 1 19 38 20 y b h 0.95 0.85 0.27 0.17 0.20 0.09 9.8 9.6 4.5 4.3 0.5 1 0.2 6.4 0.49 0.21 0.08 0.7 0.5 p e v m a a tssop38: plastic thin shrink small outline package; 38 leads; body width 4.4 mm; lead pitch 0.5 mm sot510-1 a max. 1.1 0 2.5 5 mm scale pin 1 index 2004 mar 22 51 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 16 soldering 16.1 introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. 16.2 re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 270 c depending on solder paste material. the top-surface temperature of the packages should preferably be kept: below 225 c (snpb process) or below 245 c (pb-free process) C for all bga, htsson-t and ssop-t packages C for packages with a thickness 3 2.5 mm C for packages with a thickness < 2.5 mm and a volume 3 350 mm 3 so called thick/large packages. below 240 c (snpb process) or below 260 c (pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm 3 so called small/thin packages. moisture sensitivity precautions, as indicated on packing, must be respected at all times. 16.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 16.4 manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c. 2004 mar 22 52 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 16.5 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. for more detailed information on the bga packages refer to the (lf)bga application note (an01026); order a copy from your philips semiconductors sales office. 2. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 3. these transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 c 10 c measured in the atmosphere of the reflow oven. the package body peak temperature must be kept as low as possible. 4. these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 6. wave soldering is suitable for lqfp, tqfp and qfp packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. wave soldering is suitable for ssop, tssop, vso and vssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 8. image sensor packages in principle should not be soldered. they are mounted in sockets or delivered pre-mounted on flex foil. however, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. the appropriate soldering profile can be provided on request. 9. hot bar or manual soldering is suitable for pmfp packages. package (1) soldering method wave reflow (2) bga, htsson..t (3) , lbga, lfbga, sqfp, ssop..t (3) , tfbga, uson, vfbga not suitable suitable dhvqfn, hbcc, hbga, hlqfp, hso, hsop, hsqfp, hsson, htqfp, htssop, hvqfn, hvson, sms not suitable (4) suitable plcc (5) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (5)(6) suitable ssop, tssop, vso, vssop not recommended (7) suitable cwqccn..l (8) , pmfp (9) , wqccn..l (8) not suitable not suitable 2004 mar 22 53 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 17 data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). 18 definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 19 disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2004 mar 22 54 philips semiconductors product speci?cation 5 v mixer/oscillator and low noise pll synthesizer for hybrid terrestrial tuner (digital and analog) TDA6650tt; tda6651tt 20 purchase of philips i 2 c components purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011. ? koninklijke philips electronics n.v. 2004 sca76 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands r25/03/pp 55 date of release: 2004 mar 22 document order number: 9397 750 13025 |
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